電網(wǎng)并聯(lián)電容器裝置電抗率的優(yōu)化設(shè)計(jì)方案

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摘  要：該文從技術(shù)方面出發(fā)，對(duì)并聯(lián)電容器裝置電抗率的設(shè)計(jì)方案進(jìn)行優(yōu)化，首先概述設(shè)計(jì)優(yōu)化的總體思路，隨后通過設(shè)置電抗率優(yōu)化方案的約束條件、進(jìn)行綜合諧波阻抗驗(yàn)算以及電容支路的諧振處理，總結(jié)電抗率優(yōu)化的具體實(shí)現(xiàn)方式。

關(guān)鍵詞：電容器；電抗率；諧波電流；并聯(lián)諧振；優(yōu)化設(shè)計(jì)

中圖分類號(hào)：TM53      文獻(xiàn)標(biāo)志碼：A          文章編號(hào)：2095-2945（2023）01-0108-04

Abstract： From the technical point of view， this paper optimizes the design scheme of the reactance rate of the shunt capacitor device. First of all， this paper summarizes the general idea of design optimization， and then summarizes the specific implementation of reactance optimization by setting the constraint conditions of the reactance optimization scheme， checking the comprehensive harmonic impedance and the resonance treatment of the capacitor branch.

Keywords： capacitor; reactance rate; harmonic current; parallel resonance; optimal design

在電網(wǎng)運(yùn)行中，諧波的存在會(huì)對(duì)電容器造成嚴(yán)重?fù)p害。（剩余4548字）